Bandgap voltage reference circuits operate on the principle of adding two voltages having equal and opposite temperature coefficients to produce a bandgap voltage reference. This is typically achieved by adding the base-emitter junction voltage of a forward biased transistor which is complementary to absolute temperature (CTAT), and thus decreases with absolute temperature, to a voltage which is proportional to absolute temperature (PTAT), and thus increases with absolute temperature. Typically, the PTAT voltage is developed by amplifying the voltage difference of the base-emitter voltages of two forward biased transistors operating at different current densities.
In FIG. 1 a typical prior art CMOS bandgap voltage reference circuit is illustrated. A CTAT voltage is derived from the base-emitter voltage of a first substrate bipolar transistor Q1, the temperature dependent base-emitter voltage of which is given by the following equation:
                                          V            be                    ⁡                      (            Q1            )                          =                                            V              G0                        ⁡                          (                              1                -                                  T                                      T                    0                                                              )                                +                                                    V                be                            ⁡                              (                                  T                  0                                )                                      ⁢                          T                              T                0                                              -                      σ            ⁢                          KT              q                        ⁢                          ln              ⁡                              (                                  T                                      T                    0                                                  )                                              +                                    KT              q                        ⁢                          ln              ⁡                              (                                                                            I                      c                                        ⁡                                          (                      T                      )                                                                                                  I                      c                                        ⁡                                          (                                              T                        0                                            )                                                                      )                                                                        (        1        )            where
Vbe(Q1) is the temperature dependent base-emitter voltage of the first bipolar transistor Q1,
VG0 is the bandgap energy voltage, assumed to be about 1.205 volts for silicon,
T is the operating absolute temperature,
T0 is the reference absolute temperature, generally, the middle point in the temperature range,
Vbe(T0) is the base-emitter voltage of the first transistor Q1 at the reference temperature T0,
K is Boltzmann's constant,
q is the electron charge,
Ic(T) is the collector current in the first bipolar transistor Q1 at temperature T,
Ic(T0) is the collector current in the first bipolar transistor Q1 at the reference temperature T0,
σ is the saturation current temperature exponent of the first bipolar transistor Q1.
A PTAT voltage which is derived from the difference of the base-emitter voltages of the first transistor Q1, and a second substrate bipolar transistor Q2, is developed across a first resistor r1 and is scaled onto a second resistor r2. The scaled PTAT voltage across the second resistor r2 is summed with the CTAT voltage of the first transistor Q1 to provide the bandgap voltage reference Vref across an output terminal 100 and a ground terminal 101.
The bases of the first and second transistors Q1 and Q2 are coupled to the ground terminal 101, and thus are held at a common base voltage, namely, ground. The emitter area of the second transistor Q2 is n2 times the emitter area of the first transistor Q1, and the first transistor Q1 is operated at a higher current density than the second transistor Q2. An operational amplifier (op-amp) A1 holds its respective inverting input Inn and its non-inverting input Inp at substantially the same voltage, and thus, the difference in the base-emitter voltages of the first and second transistors Q1 and Q2, which is a PTAT voltage is developed across the first resistor r1. As a result, the current flowing through the first resistor r1 is a PTAT current Ip. The PTAT current Ip flowing through the resistor r1 is drawn through a pMOS transistor M2 of a current mirror circuit, which also comprises pMOS transistors M1 and M3. By providing the pMOS transistor M1 as a diode connected transistor with the same aspect ratio
  (      W    L    )as the pMOS transistor M2, and by providing the pMOS transistor M3 with an aspect ratio n1 times larger than the aspect ratio of the pMOS transistors M1 and M2, the current flowing through the second resistor r2 which forward biases the first transistor Q1 is a PTAT current of value n1.Ip. Accordingly, the difference in base-emitter voltages of the first and second transistors Q1 and Q2 developed across the first resistor r1 is:
                              V          r1                =                              Δ            ⁢                                                  ⁢                          V              be                                =                                    KT              q                        ⁢                          ln              ⁡                              (                                  n1                  .                  n2                                )                                                                        (        2        )            where
Vr1 is the voltage developed across the resistor r1 at temperature T,
ΔVbe is the difference in the base-emitter voltages of the first and second transistors Q1 and Q2,
n1 is the aspect ratio of the pMOS transistor M3 to the pMOS transistor M1,
n2 is the ratio of the emitter area of the second transistor Q2 to the emitter area of the first transistor Q1.
The scaled value of the difference in the base-emitter voltages developed across the resistor r2 is given by the equation:
                              V          r2                =                              n1            ⁢                          r2              r1                        ⁢            Δ            ⁢                                                  ⁢            Vbe                    =                      n1            ⁢                          r2              r1                        ⁢                          KT              q                        ⁢                          ln              ⁡                              (                n1n2                )                                                                        (        3        )            where
r1 is the resistance value of the resistor r1 and
r2 is the resistance value of the resistor r2.
Thus, the bandgap voltage reference Vref relative to ground is given by the equation:
                              V          ref                =                                            V              be                        ⁡                          (              Q1              )                                +                      n1            ⁢                          r2              r1                        ⁢                          KT              q                        ⁢                          ln              ⁡                              (                n1n2                )                                                                        (        4        )            
Bandgap voltage reference circuits have been well known in the art since the early 1970s as is evidenced by the IEEE publications of Robert Widlar (IEEE Journal of Solid State Circuits Vol. SC-6 No. 1, February 1971) and A. Paul Brokaw (IEEE Journal of Solid State Circuits Vol. SC-9 No. 6, December 1974). A detailed discussion on bandgap voltage reference circuits including examples of prior art bandgap voltage reference circuits is provided in co-pending U.S. patent application Ser. No. 10/375,593 of Stefan Marinca, which was filed on Feb. 27, 2003, the contents of which are incorporated herein by reference. Bandgap voltage reference circuits are described in, for example, U.S. Pat. No. 4,808,908 of Lewis, et al and U.S. Pat. No. 5,352,973 of Audy.
Typically, the CTAT base-emitter voltage of a bipolar transistor operating at room temperature is of the order of 0.7 volts, and the difference in the base-emitter voltages ΔVbe of two transistors operating at room temperature at different current densities is in the order of 100 millivolts or less. Thus, in order to balance the CTAT base-emitter voltage of a bipolar transistor, the PTAT voltage developed by the difference in the base-emitter voltages ΔVbe must be amplified by a gain factor of the order of five in order to provide a PTAT voltage of the order of 0.5 volts for summing with the CTAT voltage. Accordingly, the PTAT voltage developed across the resistor r1 of the prior art bandgap circuit of FIG. 1 must be amplified by a factor of five to produce the PTAT voltage developed across the resistor r2 for summing with the CTAT base-emitter voltage of the transistor Q1. With the PTAT voltage so amplified, the bandgap voltage reference circuit of FIG. 1 produces a bandgap voltage reference of approximately 1.25 volts with a temperature curvature error TlnT of approximately 2.5 millivolts over a typical industrial temperature range of from −40° C. to +85° C. Correction of the voltage reference to remove the TlnT temperature curvature, which is described in U.S. Pat. No. 5,352,973 of Audy, typically results in the bandgap voltage reference being reduced to approximately 1.16 volts.
Due to process variations in CMOS processes, the bandgap voltage reference of bandgap voltage reference circuits varies from lot to lot, wafer to wafer within the same lot, and indeed even from part to part from the same wafer. The variation in the bandgap voltage reference from wafer to wafer of the same lot is due largely to voltage offsets in the op-amp and in the current mirror circuit. Voltage offsets due to current mirror offsets can be reduced by replacing the MOS transistors of the current mirror circuit with resistors, as is illustrated in the prior art bandgap voltage reference circuit of FIG. 2.
The bandgap voltage reference Vref of the prior art bandgap voltage reference circuit of FIG. 2 is produced at the output of the op-amp A1 on a terminal 100, and is provided relative to ground 101. However, in the bandgap voltage reference circuit of FIG. 2, input voltage offset of the op-amp and the input noise of the op-amp are amplified into the bandgap voltage reference by the closed loop gain G of the op-amp A1, which is given by the following equation:
                    G        =                  1          +                      r2            r1                                              (        5        )            
In CMOS processes, op-amp input voltage offsets are typically of the order of millivolts, and where the PTAT base-emitter voltage difference ΔVbe is amplified by a factor of the order of five, the op-amp input voltage offset appears in the amplified PTAT voltage as a voltage error of more than 6 millivolts. The bandgap voltage reference of the circuit of FIG. 2 is of the order of 1.25 volts, and thus the voltage error resulting from op-amp input voltage offset is approximately 6 millivolts in the 1.25 volts bandgap voltage reference.
Bandgap voltage reference circuits have been provided to reduce the sensitivity of the bandgap voltage reference to op-amp voltage offsets, and one such prior art bandgap voltage reference circuit is illustrated in FIG. 3. The prior art bandgap voltage reference circuit of FIG. 3 comprises stacked first bipolar transistors Q1 and Q3, and stacked second bipolar transistors Q2 and Q4 of larger emitter areas than that of the first transistors Q1 and Q3. The stack of first transistors are operated at a higher current density than the stack of second transistors to produce a base-emitter voltage difference which is a PTAT voltage, and is developed across the resistor r1. In this case the PTAT voltage developed across the resistor r1 is 2ΔVbe, and is gained up across the resistor r4, and summed with the CTAT voltages developed by the two transistors Q1 and Q3 to produce the bandgap voltage reference Vref between the output of the op-amp A1 on a terminal 100 and ground 101. The forward biasing emitter currents for the first and second transistors Q1 to Q4 are generated directly from the bandgap voltage reference through the resistors r2, r3, r4 and r5. However, the resistors r2, r4 and r5 could be replaced by a MOS current mirror device, if the error due to MOS transistors in the bandgap voltage reference could be tolerated.
Since the CTAT voltage of the bandgap voltage reference circuit of FIG. 3 is provided by the base-emitter voltages of two transistors, namely, the transistors Q1 and Q3, the CTAT voltage is approximately 1.4 volts. Additionally, since the PTAT voltage developed across the resistor r1 results from the difference in the base-emitter voltages of the two pairs of transistors operating at different current densities, the PTAT voltage developed across the resistor r1 is approximately 200 millivolts. To balance the CTAT voltage of 1.4 volts, the PTAT voltage developed across the resistor r1 must be amplified by a factor of five and developed across the resistor r4, in order to produce a PTAT voltage of approximately 1 volt for summing with the CTAT voltage. Thus, the bandgap voltage reference produced by the prior art bandgap voltage reference circuit of FIG. 3 is approximately 2.5 volts, and is greater than the bandgap voltage reference produced by the circuits of FIGS. 1 and 2. However, since the PTAT voltage is amplified by a factor of five, the input voltage offset of the op-amp of the prior art bandgap voltage reference circuit of FIG. 3 is also amplified by a factor of five. Assuming a similar input voltage offset for the op-amp of the circuit of FIG. 3, as that for the op-amp of the circuit of FIG. 2, the absolute value of the voltage error resulting from the op-amp voltage offset which is reflected into the bandgap voltage reference of the circuit of FIG. 3 is similar at approximately 6 millivolts. However, the relative value of the op-amp voltage offset in the bandgap voltage reference is reduced to 6 millivolts in 2.5 volts, as opposed to the relative value of the op-amp voltage offset of 6 millivolts in the bandgap voltage reference of 1.25 volts in the prior art circuits of FIGS. 1 and 2. Accordingly, the relative contribution of the voltage offset of the op-amp in the bandgap voltage reference is reduced in the bandgap voltage reference circuit of FIG. 3, and thus the sensitivity of the bandgap voltage reference to such op-amp voltage offset is similarly reduced.
U.S. Pat. No. 6,614,209 of Gregoire discloses a bandgap voltage reference circuit which avoids the need to amplify the PTAT voltage, or at least minimise the gain by which the PTAT voltage must be amplified. By providing the PTAT voltage without amplification, or if amplification is required, by minimising the gain, the effect of op-amp voltage offset in the bandgap voltage reference is minimised. Gregoire couples a plurality of PTAT voltage cells in series so that the PTAT voltages developed by the respective cells are summed together, and the summed PTAT voltages are then summed with a CTAT voltage developed across the base-emitter of a bipolar transistor. Each PTAT voltage cell of the bandgap voltage reference circuit of Gregoire comprises an op-amp and two stacks of bipolar transistors, one of which is coupled to the inverting input of the corresponding op-amp, and the other of which is coupled to the non-inverting input of the op-amp. One of the stacks in each PTAT voltage cell of Gregoire comprises two transistors, while the other comprises three transistors. The third transistor is provided for complementing a non-PTAT voltage component which would otherwise arise in the sum of the PTAT voltages.
However, the bandgap voltage reference circuit of Gregoire suffers from a serious disadvantage in that a relatively high supply voltage is required to power the op-amps, and in particular, the op-amp of the last PTAT voltage cell in the series. Even with only two PTAT voltage cells, the voltages on the inverting and non-inverting inputs of the op-amp in the last PTAT voltage cell in the series will be the equivalent of three base-emitter voltages of bipolar transistors plus three base-emitter voltage differences ΔVbe. At a temperature of −40° C. the base-emitter voltage of each transistor is of the order of 0.8 volts, and each base-emitter voltage difference ΔVbe is of the order of 50 millivolts. As a result the common input voltage of the op-amp of the second PTAT voltage cell is approximately 2.55 volts at −40° C. This, thus, will require a supply voltage of at least 2.8 volts for the current mirrors supplying the forward biasing currents to the uppermost bipolar transistors of the second PTAT voltage cell. Accordingly, the bandgap voltage reference circuit of Gregoire, in general, is unsuitable for implementing in circuits with low supply voltages, such as low voltage CMOS circuits, where the supply voltage is typically limited to 2.5 volts to 2.7 volts.
In low voltage CMOS circuits, op-amps provided with PMOS input pairs require a supply voltage of approximately 0.8 volts higher than the common input voltage of the op-amp. Accordingly, if the op-amp in the last PTAT voltage cell of Gregoire were provided with pMOS input pairs, a supply voltage of more than 3.35 volts would be required. The supply voltage required by the op-amp in the last PTAT voltage cell could be reduced by providing the op-amp with nMOS input pairs, which would require a supply voltage of approximately 2.75 volts. However, even with NMOS input pairs, the op-amp in the last of the series of PTAT voltage cells of the bandgap voltage reference circuit of Gregoire would still be unable to operate within the supply voltage of 2.5 volts to 2.7 volts of low voltage CMOS processes.
However, a disadvantage of using an op-amp with an NMOS input pair, as opposed to a pMOS input pair, is that the low frequency 1/f noise for frequencies below 10 Hz increases as the frequency decreases, and in general, is approximately five times greater in an op-amp with an NMOS input pair, than in an op-amp with a pMOS input pair. Thus, in order to minimise noise from the op-amp and in turn op-amp voltage offset being reflected into the bandgap voltage reference, it is preferable to use op-amps with pMOS input pairs. However, as discussed above, this imposes a further limitation on the available headroom within the op-amp can operate.
Accordingly, there is a need for a bandgap voltage reference circuit for producing a bandgap voltage reference which is suitable for operating in relatively low supply voltage environments, and in which the effect of op-amp voltage offsets is minimised.
The present invention is directed towards providing such a bandgap voltage reference circuit, and the invention is also directed towards providing a method for producing a bandgap voltage reference from a relatively low supply voltage, and with the effect of op-amp voltage offsets in the bandgap voltage reference minimised. The invention is also directed towards providing a PTAT voltage generating circuit for generating a PTAT voltage, which is suitable for operating in a relatively low supply voltage environment, and in which the effect of op-amp voltage offsets in the PTAT voltage is minimised.